The present invention relates to semiconductor package technology. More particularly, the present invention relates to semiconductor chip packages, stacked packages, and methods of fabricating the same.
Advances in the semiconductor industry have allowed electronic devices such as personal computers, cellular phones and personal multimedia devices to become smaller, lighter and more multi-functional. These advances include the integration of several semiconductor chips into a single package such as a package-on-package (POP) in which a plurality of chip packages are stacked, and chip packages in which a plurality of semiconductor chips are stacked.
Such multi-chip packages are advantageous in terms of their weight and form. However, the integration density of chip packages, including multi-chip packages, has to increase to meet the demand for more miniaturized electronic devices. Likewise, the overall thickness of the package has to be reduced in order to provide a small form factor (SFF). In addition, even miniaturized electronic devices must operate at a high speed and offer high performance. Thus, electrical interconnection structures of semiconductor packages need to be highly reliable if the chips are to operate at high speed.